Messages in this thread | | | Date | Thu, 31 Jul 2014 14:05:50 +0300 | From | Mikko Perttunen <> | Subject | Re: [PATCH 5/8] of: Add Tegra124 EMC bindings |
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On 31/07/14 13:48, Mikko Perttunen wrote: >> >> I see that the TRM implies the whole 4-bit field is RAM code, rather >> than there being 2 separate 2-bit fields for RAM code and boot device >> code. Can you please file a bug against the TRM to document this >> correctly? (The details of which bits are which are visible on the >> Jetson TK1 schematics for example). > > Yes, I'll file a bug.
On a closer look, the downstream kernel has been recently updated to consider the whole 4 bits the ram code. The relevant bug also has a comment mentioning that starting from T124, the whole 4 bits is considered the RAM code.
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