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SubjectRe: [PATCH] Lattice ECP3 FPGA: Correct endianness
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On Thu, 2014-07-03 at 17:54 +0200, Jean-Michel Hautbois wrote:
> This patch corrects three big/little endian issues. Tested on i.MX6.

trivial:

> diff --git a/drivers/misc/lattice-ecp3-config.c
[]
> @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
> *fw, void *context)
>
> txbuf[0] = FPGA_CMD_READ_STATUS;
> ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> - dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
> - status = *(u32 *)&rxbuf[4];
> + dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
> + status = be32_to_cpu(*(u32 *)&rxbuf[4]);

This should emit a sparse error.
It'd be simpler as:

status = be32_to_cpu(*(__be32 *)&rxbuf[4]);
dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);




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