Messages in this thread | | | Subject | Re: [PATCH 0/7] [RESEND][v4] x86: rework tlb range flushing code | From | Davidlohr Bueso <> | Date | Wed, 02 Jul 2014 12:04:50 -0700 |
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On Tue, 2014-07-01 at 09:48 -0700, Dave Hansen wrote: > x86 Maintainers, > > Could this get picked up in to the x86 tree, please? That way, > it will get plenty of time to bake before the 3.17 merge window.
I had originally tried out this series (~v1, v2 iirc) on large KVM configurations. Setting the TLB flush tunable to 33 seemed prudent and didn't cause anything weird. Feel free to add my:
Tested-by: Davidlohr Bueso <davidlohr@hp.com>
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