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    Subject[PATCH v8 2/2] phy: qcom: Add device tree bindings for IPQ806x SATA PHY
    Date
    Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on
    the IPQ806x family of SoCs.

    Signed-off-by: Kumar Gala <galak@codeaurora.org>
    ---
    v8, v7:
    * no change

    v6:
    * Moved binding to qcom-ipq806x-sata-phy.txt instead of qcom-phy.txt

    .../bindings/phy/qcom-ipq806x-sata-phy.txt | 23 ++++++++++++++++++++++
    1 file changed, 23 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt

    diff --git a/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt b/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt
    new file mode 100644
    index 0000000..76bfbd0
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt
    @@ -0,0 +1,23 @@
    +Qualcomm IPQ806x SATA PHY Controller
    +------------------------------------
    +
    +SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
    +Each SATA PHY controller should have its own node.
    +
    +Required properties:
    +- compatible: compatible list, contains "qcom,ipq806x-sata-phy"
    +- reg: offset and length of the SATA PHY register set;
    +- #phy-cells: must be zero
    +- clocks: must be exactly one entry
    +- clock-names: must be "cfg"
    +
    +Example:
    + sata_phy: sata-phy@1b400000 {
    + compatible = "qcom,ipq806x-sata-phy";
    + reg = <0x1b400000 0x200>;
    +
    + clocks = <&gcc SATA_PHY_CFG_CLK>;
    + clock-names = "cfg";
    +
    + #phy-cells = <0>;
    + };
    --
    The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
    hosted by The Linux Foundation


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