Messages in this thread | | | Date | Wed, 25 Jun 2014 22:15:51 +0200 | From | Maxime Ripard <> | Subject | Re: [PATCH v3 3/6] clk: sunxi: Support factor clocks with N factor starting not from 0 |
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On Tue, Jun 24, 2014 at 05:59:37PM +0800, Chen-Yu Tsai wrote: > The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a > N multiplier factor that starts from 1, not 0. > > This patch adds an option to the factor clk driver's config data > structures to specify the base value of N. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime
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