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    Subject[PATCH 55/71] dts: ca5: add the global timer for the A5
    Date
    From: Matthew Leach <matthew.leach@arm.com>

    The Cortex A5 contains a global timer: add the appropriate device tree
    node.

    Acked-by: Mark Rutland <mark.rutland@arm.com>
    Signed-off-by: Matthew Leach <matthew.leach@arm.com>
    Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
    ---
    arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 10 +++++++++-
    1 file changed, 9 insertions(+), 1 deletion(-)

    diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
    index c544a55..d2709b7 100644
    --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
    +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
    @@ -88,6 +88,14 @@
    interrupts = <1 13 0x304>;
    };

    + timer@2c000200 {
    + compatible = "arm,cortex-a5-global-timer",
    + "arm,cortex-a9-global-timer";
    + reg = <0x2c000200 0x20>;
    + interrupts = <1 11 0x304>;
    + clocks = <&oscclk0>;
    + };
    +
    watchdog@2c000620 {
    compatible = "arm,cortex-a5-twd-wdt";
    reg = <0x2c000620 0x20>;
    @@ -120,7 +128,7 @@
    compatible = "arm,vexpress,config-bus";
    arm,vexpress,config-bridge = <&v2m_sysreg>;

    - osc@0 {
    + oscclk0: osc@0 {
    /* CPU and internal AXI reference clock */
    compatible = "arm,vexpress-osc";
    arm,vexpress-sysreg,func = <1 0>;
    --
    1.7.9.5


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