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    SubjectRe: [PATCH] ARM: Don't ever downscale loops_per_jiffy in SMP systems#
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    On 14 May 2014 03:20, Doug Anderson <dianders@chromium.org> wrote:
    > ...but then I found the true problem shows up when we transition
    > between very low frequencies on exynos, like between 200MHz and
    > 300MHz. While transitioning between frequencies the system
    > temporarily bumps over to the "switcher" PLL running at 800MHz while
    > waiting for the main PLL to stabilize. No CPUFREQ notification is
    > sent for that. That means there's a period of time when we're running
    > at 800MHz but loops_per_jiffy is calibrated at between 200MHz and
    > 300MHz.
    >
    >
    > I'm welcome to any suggestions for how to address this.

    I have attempted to fix this in a generic way and sent an RFC patch for
    this. I have cc'd only few people from this list which I thought would be
    interested in cpufreq stuff, sorry if I missed anyone.

    https://lkml.org/lkml/2014/5/15/40


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