Messages in this thread Patch in this message | | | From | Jon Mason <> | Subject | [PATCH 3/9] NTB: Fix typo in setting one translation register | Date | Mon, 7 Apr 2014 17:52:48 -0700 |
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From: Roland Dreier <roland@purestorage.com>
In the code for Xeon devices in back-to-back mode with xeon_errata_workaround disabled, the downstream device puts the wrong value in SNB_B2B_XLAT_OFFSETL (SNB_MBAR01_DSD_ADDR vs. SNB_MBAR01_USD_ADDR).
This was spotted while reading code, since the typo has no practical effect, at least for now: the low 32 bits of both constants are actually identical anyway. However, it's clearer and safer to use the right name.
Signed-off-by: Roland Dreier <roland@purestorage.com> Signed-off-by: Jon Mason <jon.mason@intel.com> --- drivers/ntb/ntb_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ntb/ntb_hw.c b/drivers/ntb/ntb_hw.c index 170e8e6..2774d35 100644 --- a/drivers/ntb/ntb_hw.c +++ b/drivers/ntb/ntb_hw.c @@ -785,7 +785,7 @@ static int ntb_xeon_setup(struct ntb_device *ndev) /* B2B_XLAT_OFFSET is a 64bit register, but can * only take 32bit writes */ - writel(SNB_MBAR01_DSD_ADDR & 0xffffffff, + writel(SNB_MBAR01_USD_ADDR & 0xffffffff, ndev->reg_base + SNB_B2B_XLAT_OFFSETL); writel(SNB_MBAR01_USD_ADDR >> 32, ndev->reg_base + SNB_B2B_XLAT_OFFSETU); -- 1.8.3.2
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