Messages in this thread | | | Date | Wed, 2 Apr 2014 17:12:18 +0300 | From | Tero Kristo <> | Subject | Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration |
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On 04/02/2014 04:48 PM, Peter Ujfalusi wrote: > ABE DPLL frequency need to be lowered from 361267200 > to 180633600 to facilitate the ATL requironments. > The dpll_abe_m2x2_ck clock need to be set to double > of ABE DPLL rate in order to have correct clocks > for audio.
Do you have some sort of TRM reference for this?
-Tero
> > Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > --- > drivers/clk/ti/clk-7xx.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c > index f7e40734c819..19a55bf407dd 100644 > --- a/drivers/clk/ti/clk-7xx.c > +++ b/drivers/clk/ti/clk-7xx.c > @@ -16,7 +16,7 @@ > #include <linux/clkdev.h> > #include <linux/clk/ti.h> > > -#define DRA7_DPLL_ABE_DEFFREQ 361267200 > +#define DRA7_DPLL_ABE_DEFFREQ 180633600 > #define DRA7_DPLL_GMAC_DEFFREQ 1000000000 > > > @@ -322,6 +322,11 @@ int __init dra7xx_dt_clk_init(void) > if (rc) > pr_err("%s: failed to configure ABE DPLL!\n", __func__); > > + dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck"); > + rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2); > + if (rc) > + pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__); > + > dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck"); > rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ); > if (rc) >
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