lkml.org 
[lkml]   [2014]   [Apr]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [tip:x86/urgent] x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
On Sat, Apr 12, 2014 at 5:03 PM, H. Peter Anvin <hpa@zytor.com> wrote:
>>
>> No self modifying code... The far jump must be in the indirect form
>> anyhow. The CS:EIP must be accessible from user mode, but not
>> necessarily from compatibility mode. So the trampoline (the jump)
>> and data (CS:EIP) can live pretty much anywhere in virtual memory.
>> But indeed, I see what you meant now.
>>
>
> This is, in fact, exactly then what I was suggesting, except that data
> is passed directly in memory rather than in a register and letting user
> space sort it out (this could be in the vdso, but the vdso may be > 4 GB
> so it has to be in 64-bit mode until the last instruction.) The
> difference isn't huge; mostly an implementation detail.

I'm a bit confused as to exactly what everyone is suggesting. I don't
think there's any instruction that can do a direct far jump to an
address stored in a register.

ISTM it does matter whether SS or CS is the offending selector. If
it's SS, then the possible trampoline sequences are:

MOV SS, ??? / POP SS / LSS
JMP/RET

or

IRET (!)


If it's CS, then we just need a far JMP or a RET or an IRET. The far
JMP is kind of nice since we can at least use RIP-relative addressing

What are the interrupt shadow rules? I thought IRET did not block interrupts.

>
> A signal arriving while in the user space trampoline could seriously
> complicate life.

Agreed.

Note that we're not really guaranteed to have a trampoline at all.
The vdso isn't there in CONFIG_COMPAT_VDSO mode, although the number
of users of this "feature" on OpenSUSE 9 is probably zero.

--Andy


\
 
 \ /
  Last update: 2014-04-13 04:01    [W:0.171 / U:0.032 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site