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    Subject[PATCH 5/5] ARM: berlin/dt: add cpupll and syspll support to BG2
    Date
    This also moves the clocks from the clocks container node to the root.

    Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
    ---
    arch/arm/boot/dts/berlin2.dtsi | 56 +++++++++++++++++++++++++++++-------------
    1 file changed, 39 insertions(+), 17 deletions(-)

    diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
    index 56a1af2f1052..4b82076ef1ed 100644
    --- a/arch/arm/boot/dts/berlin2.dtsi
    +++ b/arch/arm/boot/dts/berlin2.dtsi
    @@ -37,24 +37,46 @@
    };
    };

    - clocks {
    - smclk: sysmgr-clock {
    - compatible = "fixed-clock";
    - #clock-cells = <0>;
    - clock-frequency = <25000000>;
    - };
    + smclk: sysmgr-clock {
    + compatible = "fixed-clock";
    + #clock-cells = <0>;
    + clock-frequency = <25000000>;
    + };

    - cfgclk: cfg-clock {
    - compatible = "fixed-clock";
    - #clock-cells = <0>;
    - clock-frequency = <100000000>;
    - };
    + cfgclk: cfg-clock {
    + compatible = "fixed-clock";
    + #clock-cells = <0>;
    + clock-frequency = <100000000>;
    + };

    - sysclk: system-clock {
    - compatible = "fixed-clock";
    - #clock-cells = <0>;
    - clock-frequency = <400000000>;
    - };
    + syspll: syspll {
    + compatible = "marvell,berlin2-pll";
    + clocks = <&smclk>;
    + #clock-cells = <0>;
    + reg = <0xf7ea0014 8>;
    + };
    +
    + cpupll: cpupll {
    + compatible = "marvell,berlin2-pll";
    + clocks = <&smclk>;
    + #clock-cells = <0>;
    + reg = <0xf7ea003c 8>;
    + };
    +
    + cpuclk: cpu-clock {
    + compatible = "fixed-factor-clock";
    + clocks = <&cpupll>;
    + #clock-cells = <0>;
    + clock-div = <1>;
    + clock-mult = <1>;
    + };
    +
    + twdclk: twdclk {
    + compatible = "fixed-factor-clock";
    + #clock-cells = <0>;
    + clocks = <&cpuclk>;
    + clock-mult = <1>;
    + clock-div = <3>;
    };

    soc {
    @@ -83,7 +105,7 @@
    compatible = "arm,cortex-a9-twd-timer";
    reg = <0xad0600 0x20>;
    interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
    - clocks = <&sysclk>;
    + clocks = <&twdclk>;
    };

    apb@e80000 {
    --
    1.8.3.2


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