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SubjectRe: [PATCH] pvh: set cr4 flags for APs
On Wed, Jan 29, 2014 at 04:15:18PM -0800, Mukesh Rathor wrote:
> We need to set cr4 flags for APs that are already set for BSP.

The title is missing the 'xen' part.

I rewrote it a bit and I think this should go in 3.14.

David, Boris: It is not the full fix as there are other parts to
make an PVH guest use 2MB or 1GB pages- but this fixes an obvious
bug.



From 797ea6812ff0a90cce966a4ff6bad57cbadc43b5 Mon Sep 17 00:00:00 2001
From: Mukesh Rathor <mukesh.rathor@oracle.com>
Date: Wed, 29 Jan 2014 16:15:18 -0800
Subject: [PATCH] xen/pvh: set CR4 flags for APs

The Xen ABI sets said flags for the BSP, but it does
not do that for the CR4. As such fix it up to make
sure we have that flag set.

Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
arch/x86/xen/enlighten.c | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index a4d7b64..201d09a 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1473,6 +1473,18 @@ static void xen_pvh_set_cr_flags(int cpu)
* X86_CR0_TS, X86_CR0_PE, X86_CR0_ET are set by Xen for HVM guests
* (which PVH shared codepaths), while X86_CR0_PG is for PVH. */
write_cr0(read_cr0() | X86_CR0_MP | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM);
+
+ if (!cpu)
+ return;
+ /*
+ * For BSP, PSE PGE are set in probe_page_size_mask(), for APs
+ * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu_init.
+ */
+ if (cpu_has_pse)
+ set_in_cr4(X86_CR4_PSE);
+
+ if (cpu_has_pge)
+ set_in_cr4(X86_CR4_PGE);
}

/*
--
1.8.3.1

>
> Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
> ---
> arch/x86/xen/enlighten.c | 12 ++++++++++++
> 1 files changed, 12 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
> index a4d7b64..201d09a 100644
> --- a/arch/x86/xen/enlighten.c
> +++ b/arch/x86/xen/enlighten.c
> @@ -1473,6 +1473,18 @@ static void xen_pvh_set_cr_flags(int cpu)
> * X86_CR0_TS, X86_CR0_PE, X86_CR0_ET are set by Xen for HVM guests
> * (which PVH shared codepaths), while X86_CR0_PG is for PVH. */
> write_cr0(read_cr0() | X86_CR0_MP | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM);
> +
> + if (!cpu)
> + return;
> + /*
> + * For BSP, PSE PGE are set in probe_page_size_mask(), for APs
> + * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu_init.
> + */
> + if (cpu_has_pse)
> + set_in_cr4(X86_CR4_PSE);
> +
> + if (cpu_has_pge)
> + set_in_cr4(X86_CR4_PGE);
> }
>
> /*
> --
> 1.7.2.3
>


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