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    SubjectRe: [patch] x86: Introduce BOOT_EFI and BOOT_CF9 into the reboot sequence loop
    On 2014/2/28 14:12, Matthew Garrett wrote:
    > On Fri, Feb 28, 2014 at 02:07:58PM +0800, Li, Aubrey wrote:
    >> On 2014/2/28 13:56, Matthew Garrett wrote:
    >>> Probably, once we've got those patches landed (I've lost track of
    >>> whether they're in 3.13 or aimed at 3.14)
    >>
    >> You didn't look the reference I quoted in the patch.
    >>
    >> It's stable if 32/64 bit linux call the corresponding 32/64bit EFI
    >> runtime service. Matt Fleming's mixed mode is aiming at 3.15:
    >>
    >> http://git.kernel.org/cgit/linux/kernel/git/mfleming/efi.git/log/?h=mixed-mode
    >
    > It's stable as long as you have the 1:1 mapping patches, which are
    > different to the mixed mode patches. Otherwise it'll work on some
    > hardware and crash on others.
    >
    >>> Mm. Not all x86 platforms support cf8/cf9 (Moorestown, for instance) and
    >>> so it's theoretically possible that they'd put some different hardware
    >>> there instead. But then, Moorestown probably has its own reboot code, so
    >>> that may not matter?
    >>
    >> Yes, Moorestown has its own machine_ops. Instead of the system hanging
    >> after issue "reboot" command, I think and suggest CF9 is worth to have a
    >> try.
    >
    > Writing to arbitrary register addresses isn't a good plan if we're on a
    > platform that might have different hardware there.
    >

    Do we have one actually? if we have, I'll remove CF9, if no, I persist
    in keeping it, because without it my box can't reboot now, :)

    >>>> Reset register address: 0xCF9
    >>>> Value to cause reset: 0x6
    >>>
    >>> Huh. But that's almost exactly what the PCI reboot code would do. Why
    >>> does the PCI method work but the ACPI one fail? Does it really depend on
    >>> ORing the original value with the reset value? Or is the timing just
    >>> somehow marginal?
    >>
    >> reboot returns at:
    >>
    >> if (!(acpi_gbl_FADT.flags & ACPI_FADT_RESET_REGISTER))
    >> return;
    >>
    >> This is a ACPI bug or intention, who knows.
    >
    > Well, how about we figure that out? Is there a full acpi dump of one of
    > these machines somewhere?
    >

    Well, I already figured that out. Reset Register Supported flag is ZERO
    in FACP table. I attached this table for your interesting.

    When I said "this is a ACPI bug or intention", I actually meant it's a
    bug or intention created by OEM.

    Thanks,
    -Aubrey

    /*
    * Intel ACPI Component Architecture
    * AML Disassembler version 20140114-64 [Jan 15 2014]
    * Copyright (c) 2000 - 2014 Intel Corporation
    *
    * Disassembly of facp.dat, Fri Jan 24 01:34:59 2014
    *
    * ACPI Data Table [FACP]
    *
    * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
    */

    [000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
    [004h 0004 4] Table Length : 000000F4
    [008h 0008 1] Revision : 05
    [009h 0009 1] Checksum : 03 /* Incorrect checksum, should be 2C */
    [00Ah 0010 6] Oem ID : "_ASUS_"
    [010h 0016 8] Oem Table ID : "A M I "
    [018h 0024 4] Oem Revision : 00000003
    [01Ch 0028 4] Asl Compiler ID : "AMI "
    [020h 0032 4] Asl Compiler Revision : 0100000D

    [024h 0036 4] FACS Address : 78EED000
    [028h 0040 4] DSDT Address : 78D49000
    [02Ch 0044 1] Model : 01
    [02Dh 0045 1] PM Profile : 08 [Tablet]
    [02Eh 0046 2] SCI Interrupt : 0000
    [030h 0048 4] SMI Command Port : 000000B2
    [034h 0052 1] ACPI Enable Value : 00
    [035h 0053 1] ACPI Disable Value : 00
    [036h 0054 1] S4BIOS Command : 00
    [037h 0055 1] P-State Control : 00
    [038h 0056 4] PM1A Event Block Address : 00000000
    [03Ch 0060 4] PM1B Event Block Address : 00000000
    [040h 0064 4] PM1A Control Block Address : 00000000
    [044h 0068 4] PM1B Control Block Address : 00000000
    [048h 0072 4] PM2 Control Block Address : 00000000
    [04Ch 0076 4] PM Timer Block Address : 00000000
    [050h 0080 4] GPE0 Block Address : 00000000
    [054h 0084 4] GPE1 Block Address : 00000000
    [058h 0088 1] PM1 Event Block Length : 00
    [059h 0089 1] PM1 Control Block Length : 00
    [05Ah 0090 1] PM2 Control Block Length : 00
    [05Bh 0091 1] PM Timer Block Length : 00
    [05Ch 0092 1] GPE0 Block Length : 00
    [05Dh 0093 1] GPE1 Block Length : 00
    [05Eh 0094 1] GPE1 Base Offset : 00
    [05Fh 0095 1] _CST Support : 00
    [060h 0096 2] C2 Latency : 0000
    [062h 0098 2] C3 Latency : 0000
    [064h 0100 2] CPU Cache Size : 0000
    [066h 0102 2] Cache Flush Stride : 0000
    [068h 0104 1] Duty Cycle Offset : 00
    [069h 0105 1] Duty Cycle Width : 00
    [06Ah 0106 1] RTC Day Alarm Index : 00
    [06Bh 0107 1] RTC Month Alarm Index : 00
    [06Ch 0108 1] RTC Century Index : 00
    [06Dh 0109 2] Boot Flags (decoded below) : 0004
    Legacy Devices Supported (V2) : 0
    8042 Present on ports 60/64 (V2) : 0
    VGA Not Present (V4) : 1
    MSI Not Supported (V4) : 0
    PCIe ASPM Not Supported (V4) : 0
    CMOS RTC Not Present (V5) : 0
    [06Fh 0111 1] Reserved : 00
    [070h 0112 4] Flags (decoded below) : 00300021
    WBINVD instruction is operational (V1) : 1
    WBINVD flushes all caches (V1) : 0
    All CPUs support C1 (V1) : 0
    C2 works on MP system (V1) : 0
    Control Method Power Button (V1) : 0
    Control Method Sleep Button (V1) : 1
    RTC wake not in fixed reg space (V1) : 0
    RTC can wake system from S4 (V1) : 0
    32-bit PM Timer (V1) : 0
    Docking Supported (V1) : 0
    Reset Register Supported (V2) : 0
    Sealed Case (V3) : 0
    Headless - No Video (V3) : 0
    Use native instr after SLP_TYPx (V3) : 0
    PCIEXP_WAK Bits Supported (V4) : 0
    Use Platform Timer (V4) : 0
    RTC_STS valid on S4 wake (V4) : 0
    Remote Power-on capable (V4) : 0
    Use APIC Cluster Model (V4) : 0
    Use APIC Physical Destination Mode (V4) : 0
    Hardware Reduced (V5) : 1
    Low Power S0 Idle (V5) : 1

    [074h 0116 12] Reset Register : [Generic Address Structure]
    [074h 0116 1] Space ID : 01 [SystemIO]
    [075h 0117 1] Bit Width : 08
    [076h 0118 1] Bit Offset : 00
    [077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
    [078h 0120 8] Address : 0000000000000CF9

    [080h 0128 1] Value to cause reset : 06
    [081h 0129 3] Reserved : 000000
    [084h 0132 8] FACS Address : 0000000078EED000
    [08Ch 0140 8] DSDT Address : 0000000078D49000
    [094h 0148 12] PM1A Event Block : [Generic Address Structure]
    [094h 0148 1] Space ID : 00 [SystemMemory]
    [095h 0149 1] Bit Width : 00
    [096h 0150 1] Bit Offset : 00
    [097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
    [098h 0152 8] Address : 0000000000000000

    [0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
    [0A0h 0160 1] Space ID : 00 [SystemMemory]
    [0A1h 0161 1] Bit Width : 00
    [0A2h 0162 1] Bit Offset : 00
    [0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
    [0A4h 0164 8] Address : 0000000000000000

    [0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
    [0ACh 0172 1] Space ID : 00 [SystemMemory]
    [0ADh 0173 1] Bit Width : 00
    [0AEh 0174 1] Bit Offset : 00
    [0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
    [0B0h 0176 8] Address : 0000000000000000

    [0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
    [0B8h 0184 1] Space ID : 00 [SystemMemory]
    [0B9h 0185 1] Bit Width : 00
    [0BAh 0186 1] Bit Offset : 00
    [0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
    [0BCh 0188 8] Address : 0000000000000000

    [0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
    [0C4h 0196 1] Space ID : 00 [SystemMemory]
    [0C5h 0197 1] Bit Width : 00
    [0C6h 0198 1] Bit Offset : 00
    [0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
    [0C8h 0200 8] Address : 0000000000000000

    [0D0h 0208 12] PM Timer Block : [Generic Address Structure]
    [0D0h 0208 1] Space ID : 00 [SystemMemory]
    [0D1h 0209 1] Bit Width : 00
    [0D2h 0210 1] Bit Offset : 00
    [0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
    [0D4h 0212 8] Address : 0000000000000000

    [0DCh 0220 12] GPE0 Block : [Generic Address Structure]
    [0DCh 0220 1] Space ID : 00 [SystemMemory]
    [0DDh 0221 1] Bit Width : 00
    [0DEh 0222 1] Bit Offset : 00
    [0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
    [0E0h 0224 8] Address : 0000000000000000

    [0E8h 0232 12] GPE1 Block : [Generic Address Structure]
    [0E8h 0232 1] Space ID : 00 [SystemMemory]
    [0E9h 0233 1] Bit Width : 00
    [0EAh 0234 1] Bit Offset : 00
    [0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
    [0ECh 0236 8] Address : 0000000000000000


    // ACPI Warning: FADT revision 5 does not match length: found F4 expected 10C

    Raw Table Data: Length 244 (0xF4)

    0000: 46 41 43 50 F4 00 00 00 05 03 5F 41 53 55 53 5F FACP......_ASUS_
    0010: 41 20 4D 20 49 20 20 20 03 00 00 00 41 4D 49 20 A M I ....AMI
    0020: 0D 00 00 01 00 D0 EE 78 00 90 D4 78 01 08 00 00 .......x...x....
    0030: B2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 04 00 00 ................
    0070: 21 00 30 00 01 08 00 00 F9 0C 00 00 00 00 00 00 !.0.............
    0080: 06 00 00 00 00 D0 EE 78 00 00 00 00 00 90 D4 78 .......x.......x
    0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    00F0: 00 00 00 00 ....
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