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SubjectRe: [patch 09/26] arm: mmp: Remove pointless fiddling with irq internals
On Mon, 24 Feb 2014, Chao Xie wrote:

> On Mon, Feb 24, 2014 at 7:17 AM, Uwe Kleine-König
> <> wrote:
> > Hi Thomas,
> >
> > On Sun, Feb 23, 2014 at 09:40:13PM -0000, Thomas Gleixner wrote:
> >> The pm-mmp2 and pm-pxa910 power management related irq_set_wake
> >> callbacks fiddle pointlessly with the irq actions for no reason except
> >> for lack of understanding how the wakeup mechanism works.
> >>
> >> On supsend the core disables all interrupts lazily, i.e. it does not
> >> mask them at the irq controller level. So any interrupt which is
> >> firing during supsend will mark the corresponding interrupt line as
> > s/supsend/suspend/ twice
> >> pending. Just before the core powers down it checks whether there are
> >> interrupts pending from interrupt lines which are marked as wakeup
> >> sources and if so it aborts the resume and resends the interrupts.
> > It's the suspend that is aborted, not the resume.
> >
> > Other than that your change looks fine.
> >
> For pxa910 and MMP2, wake up source only wake up the AP subsystem.
> The AP subsystem includes the APMU(AP Power Mangament Unit) and cores.
> Now the core is still powered down. APMU will check the interrupt
> lines, and find
> that there are interrupt pending, it will power on the cores.
> So if the irq is disabled, even wake up source can wake up AP subsystem, but the
> core is still powered down. It will not be powered up by APMU.

The interrupt is NOT disabled at the interrupt chip level. The core does:

suspend_device_irqs() {
__disable_irq() {
if (!desc->depth++)
irq_disable(desc) {
if (desc->irq_data.chip->irq_disable) {

Your chip does not have a chip->irq_disable() callback installed, so
the interrupt is not masked at the controller level. So APMU sees the
interrupt enabled.

APMU does not care about the irq_desc->depth counter and the irq_data
IRQD_DISABLED state bit.

So this hackery is completely pointless.


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