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SubjectRe: [PATCH v4 0/3] qspinlock: Introducing a 4-byte queue spinlock
On 02/17/2014 05:47 PM, H. Peter Anvin wrote:
> On 02/17/2014 12:41 PM, Waiman Long wrote:
>> v3->v4:
>> - Remove debugging code and fix a configuration error
>> - Simplify the qspinlock structure and streamline the code to make it
>> perform a bit better
>> - Add an x86 version of asm/qspinlock.h for holding x86 specific
>> optimization.
>> - Add an optimized x86 code path for 2 contending tasks to improve
>> low contention performance.
>> v2->v3:
>> - Simplify the code by using numerous mode only without an unfair option.
>> - Use the latest smp_load_acquire()/smp_store_release() barriers.
>> - Move the queue spinlock code to kernel/locking.
>> - Make the use of queue spinlock the default for x86-64 without user
>> configuration.
>> - Additional performance tuning.
>> v1->v2:
>> - Add some more comments to document what the code does.
>> - Add a numerous CPU mode to support>= 16K CPUs
>> - Add a configuration option to allow lock stealing which can further
>> improve performance in many cases.
>> - Enable wakeup of queue head CPU at unlock time for non-numerous
>> CPU mode.
>> This patch set introduces a queue-based spinlock implementation that
>> can replace the default ticket spinlock without increasing the size
>> of the spinlock data structure. As a result, critical kernel data
>> structures that embed spinlock won't increase in size and breaking
>> data alignments.
> This is starting to look good, so I have pulled it into
> tip:x86/spinlocks to start give it some testing mileage.
> -hpa

Thank for the additional testing. Please let me know if you find
anything wrong.


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