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SubjectRe: [PATCH] perf, nmi: fix unknown NMI warning

The best APIC documentation are the old data sheets for the external
APIC chips. I don't know if they cover things in such detail.

> In this case the latter NMI will actually have an overflow state to
> process so it's not a spurious NMI.

But we cannot distinguish it right? The spurious detector would
trigger in any case.

> > And if we're in a state that PMIs get re-raised quickly, we should either
> > regulate the period down or start throttling.
> It could be a different counter; where both run at 'normal' periods but
> just near miss each other by accident.

That's true.

It would be only a problem if they somehow become synchronized that
this happens very commonly. The usual defense against things like
that is to add a little randomization (I remember Stephane had
a patch for that some time ago). Also I believe it helps to have
the periods be prime numbers. But right now don't have any evidence
it's a real problem. I presume there's enough noise on a typical
setup that any such states disappear again quickly enough.


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