Messages in this thread Patch in this message | | | From | Michal Simek <> | Subject | [PATCH v5 5/7] devicetree: bindings: Add zynq ocmc node description | Date | Mon, 1 Dec 2014 14:24:56 +0100 |
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Add binding for Zynq On Chip Memory controller driver which is taking care about On Chip Memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Changes in v5: - Separate binding from the driver
Changes in v4: None Changes in v3: None Changes in v2: None
.../devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt
diff --git a/Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt b/Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt new file mode 100644 index 000000000000..dcf221e8a16e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/zynq/xlnx,zynq-ocmc.txt @@ -0,0 +1,17 @@ +Device tree bindings for Zynq's OCM controller + +The OCM is divided to 4 64kB segments which can be separately configured +to low or high location. Location is controlled via SLCR. + +Required properties: + compatible: Compatibility string. Must be "xlnx,zynq-ocmc-1.0". + reg: Specify the base and size of the OCMC registers in the memory map. + E.g.: reg = <0xf800c000 0x1000>; + +Example: +ocmc: memory-controller@f800c000 { + compatible = "xlnx,zynq-ocmc-1.0"; + interrupt-parent = <&intc>; + interrupts = <0 3 4>; + reg = <0xf800c000 0x1000>; +}; -- 1.8.2.3 [unhandled content-type:application/pgp-signature] | |