lkml.org 
[lkml]   [2014]   [Nov]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH V4 3/4] irqchip: mips-gic: Add device-tree support
From
On Thu, Nov 6, 2014 at 8:17 PM, Jason Cooper <jason@lakedaemon.net> wrote:
> On Wed, Oct 29, 2014 at 04:19:49PM -0700, Andrew Bresticker wrote:
>> Add device-tree support for the MIPS GIC. Update the GIC irqdomain's
>> xlate() callback to handle the three-cell specifier described in the
>> MIPS GIC binding document.
>>
>> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
>> Acked-by: Arnd Bergmann <arnd@arndb.de>
>> ---
>> Changes from v3:
>> - use reserved-cpu-vectors property
>> - read GIC base from CM if no reg property present
>> Changes from v2:
>> - rebased on GIC irqchip cleanups
>> - updated for change in bindings
>> - only parse first CPU vector
>> - allow platforms to use EIC mode
>> Changes from v1:
>> - updated for change in bindings
>> - set base address and enable bit in GCR_GIC_BASE
>> ---
>> drivers/irqchip/irq-mips-gic.c | 92 +++++++++++++++++++++++++++++++++++++++---
>> 1 file changed, 87 insertions(+), 5 deletions(-)
>
> I assume this is going though the mips tree...
>
> Acked-by: Jason Cooper <jason@lakedaemon.net>

Yup, that's the plan.

Thanks,
Andrew


\
 
 \ /
  Last update: 2014-11-08 00:21    [W:0.045 / U:0.160 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site