lkml.org 
[lkml]   [2014]   [Nov]   [6]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: Cache Allocation Technology Design
On Tue, 04 Nov, at 02:17:14PM, Peter Zijlstra wrote:
>
> I don't like extending cpusets further. Its already a weird and too big
> controller.
>
> What is wrong with having a specific CQM controller and using it
> together with cpusets where desired?

The specific problem that conflating cpusets and the CAT controller is
trying to solve is that on some platforms the CLOS ID doesn't move with
data that travels up the cache hierarchy, i.e. we lose the CLOS ID when
data moves from LLC to L2.

I think the idea with pinning CLOS IDs to a specific cpu and any tasks
that are using that ID is that it works around this problem out of the
box, rather than requiring sysadmins to configure things.

--
Matt Fleming, Intel Open Source Technology Center


\
 
 \ /
  Last update: 2014-11-06 18:21    [W:0.256 / U:0.012 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site