Messages in this thread | | | Date | Fri, 21 Nov 2014 21:43:34 +0100 (CET) | From | Thomas Gleixner <> | Subject | Re: [PATCH] x86: Intel Cache Allocation Technology support |
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On Fri, 21 Nov 2014, Dave Hansen wrote: > On 11/19/2014 05:05 PM, Vikas Shivappa wrote: > > + /* > > + * Hard code the checks and values for HSW SKUs. > > + * Unfortunately! have to check against only these brand name strings. > > + */ > > + > > + for (i = 0; i < 5; i++) > > + if (!strcmp(hsw_brandstrs[i], c->x86_model_id)) { > > + c->x86_cqe_closs = 4; > > + c->x86_cqe_cbmlength = 20; > > + return true; > > + } > > Please use ARRAY_SIZE() here. Otherwise, I guarantee the next string > you add to hsw_brandstrs[] gets silently ignored. > > Are there really only 5 CPUs? This: > > > http://ark.intel.com/products/family/78583/Intel-Xeon-Processor-E5-v3-Family#@Server > > lists 32 skus.
We really should find a proper software probing solution for this instead of having a gazillion of brand strings plus micro code version checks around for this.
Why cant the HW folks release a micro code version which fixes the obviously wreckaged CPUID enumeration of this feature instead of burdening us with that horror?
Can you please find a proper sized clue bat and whack your HW folks over the head for this insanity?
Thanks,
tglx
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