Messages in this thread | | | Subject | Re: [PATCH 2/4] arch: Add lightweight memory barriers fast_rmb() and fast_wmb() | From | Benjamin Herrenschmidt <> | Date | Tue, 18 Nov 2014 11:39:27 +1100 |
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On Mon, 2014-11-17 at 12:24 -0800, Alexander Duyck wrote: > Yes and no. So for example on ARM I used the dmb() operation, however > I > have to use the barrier at the system level instead of just the inner > shared domain. However on many other architectures they are just the > same as the smp_* variants. > > Basically the resultant code is somewhere between the smp and non-smp > barriers in terms of what they cover.
There I don't quite follow you. You need to explain better especially in the documentation because otherwise people will get it wrong...
If it's ordering in the coherent domain, I fail to see how a DMA agent is different than another processor when it comes to barriers, so I fail to see the difference with smp_*
I understand the MMIO vs. memory issue, we do have the same on powerpc, but that other aspect eludes me.
Ben.
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