Messages in this thread | | | From | "Luck, Tony" <> | Subject | RE: [PATCH v3 1/2] x86, mce, severity: extend the the mce_severity mechanism to handle UCNA/DEFERRED error | Date | Mon, 10 Nov 2014 23:32:12 +0000 |
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But then I tested it ...
I injected a UC error to memory - then did a simple byte write to the target line. This resulted in two banks logging errors:
[ 124.638045] poll: CPU54 saw ec00000000010092 in bank 7 [ 124.639006] poll: severity = 0 [ 124.647333] poll: CPU54 saw b800000000200179 in bank 3 [ 124.648322] poll: severity = 1
The bank 7 error reported as severity 0 because EN=0 ... so we took no action for it.
The bank 3 error got past that hurdle, then through the next BIT(8) set indicates a cache error. Fell at the last check because ADDRV=0.
I think the severity table entry for the "EN" check should have been skipped when calling from the CMCI handler. Then we would have seen severity=1 from the bank 7 error. It would have passed the other tests too (BIT(7) and ADDRV).
-Tony
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