lkml.org 
[lkml]   [2014]   [Nov]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O accessors
Adding Boris in Cc: as he wrote that part.

On 10/11/2014 at 14:11:44 -0800, Kevin Cernekee wrote :
> On Mon, Nov 10, 2014 at 2:00 PM, Kevin Hilman <khilman@kernel.org> wrote:
> > Kevin Cernekee <cernekee@gmail.com> writes:
> >
> >> Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating
> >> the irqchip.
> >>
> >> Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
> >
> > I bisected a couple ARM boot failures in next-20141110 on atmel sama5 platforms down to
> > this patch, though I'm not quite yet sure how it's causing the failure.
> > I'm not getting any console output, so haven't been able to dig deeper
> > yet. Maybe the atmel maintainers (Cc'd) can help dig.
> >
> > I've confirmed that reverting $SUBJECT patch (commit
> > b79055952badbd73710685643bab44104f2509ea2) on top of next-20141110 gets
> > things booting again.
> >
> > Also, it only happens with sama5_defconfig, not with multi_v7_defconfig.
>
> In drivers/irqchip/irq-atmel-aic-common.c I see:
>
> ret = irq_alloc_domain_generic_chips(domain, 32, 1, name,
> handle_level_irq, 0, 0,
> IRQCHIP_SKIP_SET_WAKE);
>
> and IRQCHIP_SKIP_SET_WAKE is (1 << 4), same as IRQ_GC_BE_IO.
>
> Is it possible that the caller is passing values intended for
> irq_chip->flags into a function expecting
> irq_domain_chip_generic->gc_flags ?

--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


\
 
 \ /
  Last update: 2014-11-11 00:41    [W:0.104 / U:0.496 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site