lkml.org 
[lkml]   [2014]   [Oct]   [8]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 11/11] perf/x86/intel: Perform rotation on Intel CQM RMIDs
On Wed, Sep 24, 2014 at 03:04:15PM +0100, Matt Fleming wrote:
> This scheme reserves one RMID at all times for rotation. When we need to
> schedule a new event we give it the reserved RMID, pick a victim event
> from the front of the global CQM list and wait for the victim's RMID to
> drop to zero occupancy, before it becomes the new reserved RMID.

> +/*
> + * If we fail to assign a new RMID for intel_cqm_rotation_rmid because
> + * cachelines are still tagged with RMIDs in limbo, we progressively
> + * increment the threshold until we find an RMID in limbo with <=
> + * __intel_cqm_threshold lines tagged. This is designed to mitigate the
> + * problem where cachelines tagged with an RMID are not steadily being
> + * evicted.
> + *
> + * On successful rotations we decrease the threshold back towards zero.
> + */
> +static unsigned int __intel_cqm_threshold;

Ah, so I was about to tell you there is the possibiliy we'll never quite
reach 0. But it appears you've cured that with this adaptive threshold
thing?

Is there an upper bound on the threshold after which we'll just wait, or
will you keep increasing it until something matches?


\
 
 \ /
  Last update: 2014-10-08 14:01    [W:0.313 / U:0.088 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site