Messages in this thread | | | From | Leonid Yegoshin <> | Subject | Re: [PATCH 0/3] MIPS executable stack protection | Date | Sat, 4 Oct 2014 16:17:03 +0000 |
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Linus, it works on CPU with hardware page table walker - MIPS P5600 aka Apache.
I was involved in architecture development of HTW and took care of it.
Linus Torvalds <torvalds@linux-foundation.org> wrote:
On Sat, Oct 4, 2014 at 1:23 AM, Peter Zijlstra <peterz@infradead.org> wrote: > On Fri, Oct 03, 2014 at 08:17:14PM -0700, Leonid Yegoshin wrote: >> The following series implements an executable stack protection in MIPS. >> >> It sets up a per-thread 'VDSO' page and appropriate TLB support. > > So traditionally we've always avoided per-thread pages like that. What > makes it worth it on MIPS?
Nothing makes it worth it on MIPS.
It may be easy to implement when you have all software-fill of TLB's, but it's a mistake even then - because it means that you'll never be able to do hardware TLB walkers.
And MIPS *does* have hardware TLB walkers, even if they are not necessarily available everywhere.
So this is a horrible idea. Don't do it. Page tables need to be per-process, not per thread, so that page tables can be shared.
Linus
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