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    Subject[PATCH 06/17] x86: Use new cache mode type in arch/x86/mm/init_64.c
    Date
    Instead of directly using the cache mode bits in the pte switch to
    using the cache mode type.

    Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
    Signed-off-by: Juergen Gross <jgross@suse.com>
    ---
    arch/x86/mm/init_64.c | 9 ++++++---
    1 file changed, 6 insertions(+), 3 deletions(-)

    diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
    index 4cb8763..5390a5f 100644
    --- a/arch/x86/mm/init_64.c
    +++ b/arch/x86/mm/init_64.c
    @@ -338,12 +338,15 @@ pte_t * __init populate_extra_pte(unsigned long vaddr)
    * Create large page table mappings for a range of physical addresses.
    */
    static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
    - pgprot_t prot)
    + enum page_cache_mode cache)
    {
    pgd_t *pgd;
    pud_t *pud;
    pmd_t *pmd;
    + pgprot_t prot;

    + pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
    + pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
    BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
    for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
    pgd = pgd_offset_k((unsigned long)__va(phys));
    @@ -366,12 +369,12 @@ static void __init __init_extra_mapping(unsigned long phys, unsigned long size,

    void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
    {
    - __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE);
    + __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
    }

    void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
    {
    - __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE_NOCACHE);
    + __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
    }

    /*
    --
    1.8.4.5


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