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SubjectRe: [PATCH 05/11] irqchip: bcm7120-l2: Make sure all register accesses use base+offset
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On Tuesday 28 October 2014 20:58:52 Kevin Cernekee wrote:
>
> irq_gc_lock(gc);
> /* Save the current mask and the interrupt forward mask */
> - b->saved_mask = __raw_readl(b->base) | b->irq_fwd_mask;
> + b->saved_mask = __raw_readl(b->base + IRQEN) | b->irq_fwd_mask;
> if (b->can_wake) {
> reg = b->saved_mask | gc->wake_active;
> - __raw_writel(reg, b->base);
> + __raw_writel(reg, b->base + IRQEN);
> }
> irq_gc_unlock(gc);
> }
> @@ -81,7 +81,7 @@ static void bcm7120_l2_intc_resume(struct irq_data *d)
>
> /* Restore the saved mask */
> irq_gc_lock(gc);
> - __raw_writel(b->saved_mask, b->base);
> + __raw_writel(b->saved_mask, b->base + IRQEN);
> irq_gc_unlock(gc);
>

You should really change this one too, to use fixed-endian accessors.
__raw_writel can't safely be used in drivers, and it will break
big-endian kernels running on ARM BRCMSTB.

Arnd


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