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    Subject[RFC V5 3/3] arm64:add bitrev.h file to support rbit instruction
    This patch add bitrev.h file to support rbit instruction,
    so that we can do bitrev operation by hardware.
    Signed-off-by: Yalin Wang <yalin.wang@sonymobile.com>
    ---
    arch/arm64/Kconfig | 1 +
    arch/arm64/include/asm/bitrev.h | 28 ++++++++++++++++++++++++++++
    2 files changed, 29 insertions(+)
    create mode 100644 arch/arm64/include/asm/bitrev.h

    diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
    index 9532f8d..b1ec1dd 100644
    --- a/arch/arm64/Kconfig
    +++ b/arch/arm64/Kconfig
    @@ -35,6 +35,7 @@ config ARM64
    select HANDLE_DOMAIN_IRQ
    select HARDIRQS_SW_RESEND
    select HAVE_ARCH_AUDITSYSCALL
    + select HAVE_ARCH_BITREVERSE
    select HAVE_ARCH_JUMP_LABEL
    select HAVE_ARCH_KGDB
    select HAVE_ARCH_TRACEHOOK
    diff --git a/arch/arm64/include/asm/bitrev.h b/arch/arm64/include/asm/bitrev.h
    new file mode 100644
    index 0000000..292a5de
    --- /dev/null
    +++ b/arch/arm64/include/asm/bitrev.h
    @@ -0,0 +1,28 @@
    +#ifndef __ASM_ARM64_BITREV_H
    +#define __ASM_ARM64_BITREV_H
    +
    +static __always_inline __attribute_const__ u32 __arch_bitrev32(u32 x)
    +{
    + if (__builtin_constant_p(x)) {
    + x = (x >> 16) | (x << 16);
    + x = ((x & 0xFF00FF00) >> 8) | ((x & 0x00FF00FF) << 8);
    + x = ((x & 0xF0F0F0F0) >> 4) | ((x & 0x0F0F0F0F) << 4);
    + x = ((x & 0xCCCCCCCC) >> 2) | ((x & 0x33333333) << 2);
    + return ((x & 0xAAAAAAAA) >> 1) | ((x & 0x55555555) << 1);
    + }
    + __asm__ ("rbit %w0, %w1" : "=r" (x) : "r" (x));
    + return x;
    +}
    +
    +static __always_inline __attribute_const__ u16 __arch_bitrev16(u16 x)
    +{
    + return __arch_bitrev32((u32)x) >> 16;
    +}
    +
    +static __always_inline __attribute_const__ u8 __arch_bitrev8(u8 x)
    +{
    + return __arch_bitrev32((u32)x) >> 24;
    +}
    +
    +#endif
    +
    --
    2.1.1
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