Messages in this thread | | | Date | Mon, 27 Oct 2014 18:32:31 +0100 | From | Michael Büsch <> | Subject | Re: [PATCH 08/11] ssb: driver_chip_comon_pmu: Fix probable mask then right shift defect |
| |
On Sun, 26 Oct 2014 22:25:04 -0700 Joe Perches <joe@perches.com> wrote:
> Precedence of & and >> is not the same and is not left to right. > shift has higher precedence and should be done after the mask. > > Add parentheses around the mask. > > Signed-off-by: Joe Perches <joe@perches.com>
Good catch.
Reviewed-by: Michael Büsch <m@bues.ch>
> --- > drivers/ssb/driver_chipcommon_pmu.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c > index 1173a09..bc71583 100644 > --- a/drivers/ssb/driver_chipcommon_pmu.c > +++ b/drivers/ssb/driver_chipcommon_pmu.c > @@ -621,8 +621,8 @@ static u32 ssb_pmu_get_alp_clock_clk0(struct ssb_chipcommon *cc) > u32 crystalfreq; > const struct pmu0_plltab_entry *e = NULL; > > - crystalfreq = chipco_read32(cc, SSB_CHIPCO_PMU_CTL) & > - SSB_CHIPCO_PMU_CTL_XTALFREQ >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT; > + crystalfreq = (chipco_read32(cc, SSB_CHIPCO_PMU_CTL) & > + SSB_CHIPCO_PMU_CTL_XTALFREQ) >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT; > e = pmu0_plltab_find_entry(crystalfreq); > BUG_ON(!e); > return e->freq * 1000;
-- Michael [unhandled content-type:application/pgp-signature] | |