Messages in this thread | | | Date | Mon, 27 Oct 2014 08:47:48 +0100 | From | Ingo Molnar <> | Subject | Re: [PATCH] x86: Fix XT-PIC-XT-PIC in /proc/interrupts |
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* Maciej W. Rozycki <macro@linux-mips.org> wrote:
> Fix duplicate XT-PIC seen in /proc/interrupts on x86 systems that make > use of 8259A Programmable Interrupt Controllers. Specifically convert > output like this: > > CPU0 > 0: 76573 XT-PIC-XT-PIC timer > 1: 11 XT-PIC-XT-PIC i8042 > 2: 0 XT-PIC-XT-PIC cascade > 4: 8 XT-PIC-XT-PIC serial > 6: 3 XT-PIC-XT-PIC floppy > 7: 0 XT-PIC-XT-PIC parport0 > 8: 1 XT-PIC-XT-PIC rtc0 > 10: 448 XT-PIC-XT-PIC fddi0 > 12: 23 XT-PIC-XT-PIC eth0 > 14: 2464 XT-PIC-XT-PIC ide0 > NMI: 0 Non-maskable interrupts > ERR: 0 > > to one like this: > > CPU0 > 0: 122033 XT-PIC timer > 1: 11 XT-PIC i8042 > 2: 0 XT-PIC cascade > 4: 8 XT-PIC serial > 6: 3 XT-PIC floppy > 7: 0 XT-PIC parport0 > 8: 1 XT-PIC rtc0 > 10: 145 XT-PIC fddi0 > 12: 31 XT-PIC eth0 > 14: 2245 XT-PIC ide0 > NMI: 0 Non-maskable interrupts > ERR: 0 > > that is one like we used to have from ~2.2 till it was changed sometime. > > The rationale is there is no value in this duplicate information, it > merely clutters output and looks ugly. We only have one handler for > 8259A interrupts so there is no need to give it a name separate from the > name already given to irq_chip. > > We could define meaningful names for handlers based on bits in the ELCR > register on systems that have it or the value of the LTIM bit we use in > ICW1 otherwise (hardcoded to 0 though with MCA support gone), to tell > edge-triggered and level-triggered inputs apart. While that information > does not affect 8259A interrupt handlers it could help people determine > which lines are shareable and which are not. That is material for a > separate change though. > > Any tools that parse /proc/interrupts are supposed not to be affected > since it was many years we used the format this change converts back to.
What's the effect of this change on the output for non-8259A irq controllers?
Thanks,
Ingo
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