Messages in this thread |  | | From | Kevin Hilman <> | Subject | Re: [PATCH] ARM: OMAP4+: PM: Program CPU logic power state | Date | Fri, 24 Oct 2014 11:03:31 -0700 |
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Nishanth Menon <nm@ti.com> writes:
> CPU logic power state is never programmed in either the initialization > or the suspend/resume logic, instead, we depend on mpuss to program this > properly. However, this leaves CPU logic power state indeterminate and > most probably in reset configuration (If bootloader or other similar > software have'nt monkeyed with the register). This can make powerstate= > RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and > in OSWR, there can be context loss when the code does not expect it. > > To prevent all these confusions, just support clearly ON, INA, CSWR, > OFF which is the intent of the existing code by explicitly programming > logic state. > > NOTE: since this is a hot path (using in cpuidle), the exit path just > programs powerstate (logic state is immaterial when powerstate is ON). > > Without doing this, we end up with lockups when CPUs enter OSWR and > multiple blocks loose context, when we expect them to hit CSWR. > > Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
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