Messages in this thread | | | Date | Tue, 21 Oct 2014 15:08:32 +0200 | Subject | Re: [PATCH v2 0/12] perf/x86: implement HT leak workaround for SNB/IVB/HSW | From | Stephane Eranian <> |
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On Tue, Oct 21, 2014 at 3:03 PM, Peter Zijlstra <peterz@infradead.org> wrote: > On Tue, Oct 21, 2014 at 02:28:06PM +0200, Stephane Eranian wrote: >> Peter, >> >> On Tue, Oct 21, 2014 at 1:25 PM, Peter Zijlstra <peterz@infradead.org> wrote: >> > >> > >> > lkml.kernel.org/r/CABPqkBRbst4sgpgE5O_VXt-CSC0VD=aP2KWA0e3Uy64tw7df3A@mail.gmail.com >> > >> > I missed that 3 lines if they were in here. >> > >> I did not put them in there because there is another problem. >> If you partition the generic counters 2 and 2, then some CPUs will not >> be able to measure some events. >> Unfortunately, there is no way to partition the 4 counters such that >> all the events can be measured by >> each CPU. Some events or precise sampling requires counter 2 for >> instance (like prec_dist). >> That's why I did not put this fix in. > > Ah, I wasn't thinking about a hard partition, just a limit on the number > of exclusive counters any one CPU can claim such as to not starve. Or is > that what you were talking about? I feel not being able to starve > another CPU is more important than a better utilization bound for > counter scheduling.
So you're saying, just limit number of used counters to 2 regardless of which one they are. So sometimes, this will avoid the problem aforementioned and sometimes not. We can try that.
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