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    Subject[PATCH v2 4/5] ARM: berlin: Add AHCI and SATA PHY nodes to BG2
    Date
    Add DT nodes for the AHCI controller and SATA PHY found on Marvell
    Berlin2 SoCs.

    Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
    Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
    ---
    Changelog:
    v1->v2:
    - remove status = "disabled" from SATA controller node (Suggested by
    Antoine)

    Cc: Kishon Vijay Abraham I <kishon@ti.com>
    Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com>
    Cc: devicetree@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-kernel@vger.kernel.org
    ---
    arch/arm/boot/dts/berlin2.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
    1 file changed, 39 insertions(+)

    diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
    index 9d7c810ebd0b..f39090491eb2 100644
    --- a/arch/arm/boot/dts/berlin2.dtsi
    +++ b/arch/arm/boot/dts/berlin2.dtsi
    @@ -246,6 +246,45 @@
    };
    };

    + ahci: sata@e90000 {
    + compatible = "marvell,berlin2-ahci", "generic-ahci";
    + reg = <0xe90000 0x1000>;
    + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
    + clocks = <&chip CLKID_SATA>;
    + #address-cells = <1>;
    + #size-cells = <0>;
    +
    + sata0: sata-port@0 {
    + reg = <0>;
    + phys = <&sata_phy 0>;
    + status = "disabled";
    + };
    +
    + sata1: sata-port@1 {
    + reg = <1>;
    + phys = <&sata_phy 1>;
    + status = "disabled";
    + };
    + };
    +
    + sata_phy: phy@e900a0 {
    + compatible = "marvell,berlin2-sata-phy";
    + reg = <0xe900a0 0x200>;
    + clocks = <&chip CLKID_SATA>;
    + #address-cells = <1>;
    + #size-cells = <0>;
    + #phy-cells = <1>;
    + status = "disabled";
    +
    + sata-phy@0 {
    + reg = <0>;
    + };
    +
    + sata-phy@1 {
    + reg = <1>;
    + };
    + };
    +
    chip: chip-control@ea0000 {
    compatible = "marvell,berlin2-chip-ctrl";
    #clock-cells = <1>;
    --
    2.1.1
    --
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