Messages in this thread | | | From | Alexandre Courbot <> | Date | Fri, 17 Oct 2014 17:47:47 +0900 | Subject | Re: [PATCHv3 2/3] gpio: sch: Add support for Intel Quark X1000 SoC |
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On Thu, Oct 16, 2014 at 7:06 PM, Mika Westerberg <mika.westerberg@intel.com> wrote: > On Thu, Oct 16, 2014 at 11:51:14AM +0800, Chang Rebecca Swee Fun wrote: >> Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between >> the legacy I/O bridge and the GPIO controller. >> >> GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC. >> Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from >> the suspend power well. >> >> This piece of work is derived from Dan O'Donovan's initial work for Quark >> X1000 enabling. >> >> Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> > > Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
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