Messages in this thread | | | Subject | Re: [PATCH v3 6/8] phy: miphy28lp: Add SSC support for PCIE | From | Valdis.Kletnieks@vt ... | Date | Mon, 13 Oct 2014 12:12:18 -0400 |
| |
On Mon, 13 Oct 2014 10:16:06 +0200, Gabriel Fernandez said:
> Concerning multiple writing in MIPHY_PLL_SBR_1, the writing of the > first 0 it's to be sure there is no previous request. > Then we take account new setting by writing 0x02. > And then we make it 0 to make sure there is no other pending requests. > > I added comments and macro to be more clear (see the code below).
Thanks, that will be a lot clearer to some poor soul down the road who has to delve in here (possibly to figure out if a new part can use the same driver and/or what changes need to be made).
[unhandled content-type:application/pgp-signature] | |