Messages in this thread Patch in this message | | | Date | Mon, 13 Oct 2014 13:10:32 +0100 | From | Marc Zyngier <> | Subject | Re: [PATCH v3 3/7] irqchip: gic: Support hierarchy irq domain. |
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On 13/10/14 11:43, Joe.C wrote: > On Thu, 2014-10-09 at 17:59 +0100, Marc Zyngier wrote: >> On 09/10/14 15:29, Joe.C wrote >>> @@ -952,7 +988,11 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, >>> >>> gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ >>> >>> - if (of_property_read_u32(node, "arm,routable-irqs", >>> + if (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) && >>> + of_find_property(node, "arm,irq-domain-hierarchy", NULL)) >>> + gic->domain = irq_domain_add_linear(node, gic_irqs, >>> + &gic_irq_domain_hierarchy_ops, gic); >> >> I really think that looking for a property is the wrong thing to do. If >> "node" is non-NULL, then we're pretty sure that we're initializing from >> DT, and that a pure linear domain should be the right thing, leaving the >> legacy stuff for the few non-DT platforms that are still around. >> >> Thanks, >> >> M. > > The only reason I introduce "arm,irq-domain-hierarchy" property is > trying to keep original behavior when hierarchy irq domain is not used. > Without this, when a board init GIC with DT, all driver will have to use > devicetree. I'm not sure we want to break things like this.
I don't think we want to support a "middle of the road" setup, where the GIC is probed by DT, but some devices have hardcoded interrupts.
> I will remove this and just use linear for all DT in my next version.
I came up with the attached patch, which allows me to boot my test platform (together with the other fix I posted earlier).
Thanks,
M. -- Jazz is not dead. It just smells funny...From 97d4ea1f0922fb47dd1b09cd2694b7fa5b519db9 Mon Sep 17 00:00:00 2001 From: Marc Zyngier <marc.zyngier@arm.com> Date: Mon, 13 Oct 2014 10:57:28 +0100 Subject: [PATCH] fixup! irqchip: gic: Support hierarchy irq domain.
--- drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-gic.c | 53 ++++++++++++++++++++++------------------------- 2 files changed, 26 insertions(+), 28 deletions(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index b8632bf..2a48e0a 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -5,6 +5,7 @@ config IRQCHIP config ARM_GIC bool select IRQ_DOMAIN + select IRQ_DOMAIN_HIERARCHY select MULTI_IRQ_HANDLER config GIC_NON_BANKED diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 17f5aa6..a99c211 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -835,8 +835,6 @@ static struct notifier_block gic_cpu_notifier = { }; #endif - -#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *arg) { @@ -870,10 +868,8 @@ static void gic_irq_domain_free(struct irq_domain *domain, unsigned int virq, static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = { .alloc = gic_irq_domain_alloc, .free = gic_irq_domain_free, + .xlate = gic_irq_domain_xlate, }; -#else -#define gic_irq_domain_hierarchy_ops 0 -#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ static const struct irq_domain_ops gic_irq_domain_ops = { .map = gic_irq_domain_map, @@ -965,18 +961,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic_cpu_map[i] = 0xff; /* - * For primary GICs, skip over SGIs. - * For secondary GICs, skip over PPIs, too. - */ - if (gic_nr == 0 && (irq_start & 31) > 0) { - hwirq_base = 16; - if (irq_start != -1) - irq_start = (irq_start & ~31) + 16; - } else { - hwirq_base = 32; - } - - /* * Find out how many interrupts are supported. * The GIC only supports up to 1020 interrupt sources. */ @@ -986,14 +970,31 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic_irqs = 1020; gic->gic_irqs = gic_irqs; - gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ + if (node) { /* DT case */ + const struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops; + + if (!of_property_read_u32(node, "arm,routable-irqs", + &nr_routable_irqs)) { + ops = &gic_irq_domain_ops; + gic_irqs = nr_routable_irqs; + } + + gic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic); + } else { /* Non-DT case */ + /* + * For primary GICs, skip over SGIs. + * For secondary GICs, skip over PPIs, too. + */ + if (gic_nr == 0 && (irq_start & 31) > 0) { + hwirq_base = 16; + if (irq_start != -1) + irq_start = (irq_start & ~31) + 16; + } else { + hwirq_base = 32; + } + + gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ - if (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) && - of_find_property(node, "arm,irq-domain-hierarchy", NULL)) - gic->domain = irq_domain_add_linear(node, gic_irqs, - &gic_irq_domain_hierarchy_ops, gic); - else if (of_property_read_u32(node, "arm,routable-irqs", - &nr_routable_irqs)) { irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id()); if (IS_ERR_VALUE(irq_base)) { @@ -1004,10 +1005,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base, hwirq_base, &gic_irq_domain_ops, gic); - } else { - gic->domain = irq_domain_add_linear(node, nr_routable_irqs, - &gic_irq_domain_ops, - gic); } if (WARN_ON(!gic->domain)) -- 2.0.4 | |