Messages in this thread |  | | Date | Fri, 10 Oct 2014 16:40:26 -0700 | From | Leonid Yegoshin <> | Subject | Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack |
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On 10/10/2014 03:56 PM, David Daney wrote: > >> > Right, look at uprobes, it does exactly all this with a single page. >> > Slot allocation will block waiting for a free slot when all are in >> use. >> >> I don't see a reason to change my 300 lines design into much more >> lengthy code. That code has more links to the rest of kernel and high >> possibility to execute atomic operation/locks/mutex/etc - I can't do it >> for emulation of MIPS locking instructions. >> > > It isn't just the number of lines of code that is important. > > Doesn't your solution consume an extra page for each thread requiring > emulation? That could be a significant amount of memory in a system > with many threads.
Yes, you right. However, per-thread memory is useful for many goals.
> > Are you are using this to emulate atomic operations in addition to FPU > branch delay slot instructions? Where is the code that does that?
Yes, in MIPS R2 emulator - MIPS R6 changed LL/LLD/SC/SCD opcodes and offset size. The code-in-developement is in ssh://git.linux-mips.org/pub/scm/yegoshin/mips.git, branch android-linux-mti-3.10.14
- Leonid.
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