Messages in this thread | | | Date | Thu, 23 Jan 2014 09:15:38 -0800 | Subject | Re: [PATCH v10 1/4] qrwlock: A queue read/write lock implementation | From | Linus Torvalds <> |
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On Thu, Jan 23, 2014 at 9:12 AM, Waiman Long <waiman.long@hp.com> wrote: > > I thought that all atomic RMW instructions are memory barrier.
On x86 they are. Not necessarily elsewhere.
> If they are not, what kind of barrier should be added?
smp_mb__before_atomic_xyz() and smp_mb__after_atomic_xyz() will do it, and are no-op (well, barriers - I don't think it matters) on x86.
Linus
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