Messages in this thread | | | Date | Thu, 23 Jan 2014 07:30:18 -0800 | From | "H. Peter Anvin" <> | Subject | Re: [PATCH] x86, tsc: Add missing Baytrail frequency to the table |
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On 01/23/2014 07:09 AM, One Thousand Gnomes wrote: > On Thu, 23 Jan 2014 13:04:03 +0200 > Mika Westerberg <mika.westerberg@linux.intel.com> wrote: > >> Baytrail is based on Silvermont core so MSR_FSB_FREQ[2:0] == 0 means that >> the CPU reference clock runs at 83.3MHz. Without this we crash a bit later >> with backtrace looking like: > > Would it not be wise to also make the code robust against future failures > of this kind and at least bitch rather than divide by 0 ? >
Chicken! ;)
-hpa
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