lkml.org 
[lkml]   [2014]   [Jan]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 3.11 176/208] tg3: Initialize REG_BASE_ADDR at PCI config offset 120 to 0
    Date
    3.11.10.3 -stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Nat Gurumoorthy <natg@google.com>

    commit 388d3335575f4c056dcf7138a30f1454e2145cd8 upstream.

    The new tg3 driver leaves REG_BASE_ADDR (PCI config offset 120)
    uninitialized. From power on reset this register may have garbage in it. The
    Register Base Address register defines the device local address of a
    register. The data pointed to by this location is read or written using
    the Register Data register (PCI config offset 128). When REG_BASE_ADDR has
    garbage any read or write of Register Data Register (PCI 128) will cause the
    PCI bus to lock up. The TCO watchdog will fire and bring down the system.

    Signed-off-by: Nat Gurumoorthy <natg@google.com>
    Acked-by: Michael Chan <mchan@broadcom.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
    ---
    drivers/net/ethernet/broadcom/tg3.c | 3 +++
    1 file changed, 3 insertions(+)

    diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
    index e7af885..f9aec90 100644
    --- a/drivers/net/ethernet/broadcom/tg3.c
    +++ b/drivers/net/ethernet/broadcom/tg3.c
    @@ -16436,6 +16436,9 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
    /* Clear this out for sanity. */
    tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);

    + /* Clear TG3PCI_REG_BASE_ADDR to prevent hangs. */
    + tw32(TG3PCI_REG_BASE_ADDR, 0);
    +
    pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
    &pci_state_reg);
    if ((pci_state_reg & PCISTATE_CONV_PCI_MODE) == 0 &&
    --
    1.8.3.2


    \
     
     \ /
      Last update: 2014-01-13 20:41    [W:3.026 / U:0.064 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site