Messages in this thread Patch in this message | | | From | Heiko Stübner <> | Subject | [PATCH v5 1/4] ARM: S3C24XX: number the dma clocks | Date | Wed, 18 Sep 2013 21:19:17 +0200 |
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Each dma channel has its own clock. The upcoming dma driver wants to handle these itself and therefore needs to be able to get the correct clock for a channel.
Therefore rename the dma clocks to "dma.X" for s3c2412, s3c2416 and s3c2443. This does not change the behaviour for the old dma driver at all, as all dma clocks are still always on and not handled by the old dma driver at all.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> --- changes since v2: - remove noise from commit message
arch/arm/mach-s3c24xx/clock-s3c2412.c | 8 ++++---- arch/arm/mach-s3c24xx/common-s3c2443.c | 12 ++++++------ 2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2412.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c index d8f253f..11b3b28 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2412.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2412.c @@ -484,22 +484,22 @@ static struct clk init_clocks_disable[] = { static struct clk init_clocks[] = { { - .name = "dma", + .name = "dma.0", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA0, }, { - .name = "dma", + .name = "dma.1", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA1, }, { - .name = "dma", + .name = "dma.2", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA2, }, { - .name = "dma", + .name = "dma.3", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA3, diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c index f6b9f2e..65d3eef 100644 --- a/arch/arm/mach-s3c24xx/common-s3c2443.c +++ b/arch/arm/mach-s3c24xx/common-s3c2443.c @@ -438,32 +438,32 @@ static struct clk init_clocks_off[] = { static struct clk init_clocks[] = { { - .name = "dma", + .name = "dma.0", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA0, }, { - .name = "dma", + .name = "dma.1", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA1, }, { - .name = "dma", + .name = "dma.2", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA2, }, { - .name = "dma", + .name = "dma.3", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA3, }, { - .name = "dma", + .name = "dma.4", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA4, }, { - .name = "dma", + .name = "dma.5", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA5, -- 1.7.10.4
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