Messages in this thread | | | From | Paul Zimmerman <> | Subject | RE: [PATCH] usb: xhci-plat: Enable USB 2.0 hardware LPM support for platform xHCs | Date | Thu, 29 Aug 2013 18:40:44 +0000 |
| |
> From: jwerner@google.com [mailto:jwerner@google.com] On Behalf Of Julius Werner > Sent: Thursday, August 29, 2013 11:07 AM > > > If you take a look at Table > > 13: BESL/HIRD Encoding from the xHCI spec version including errata to > > 08/14/2012 > > Could you please provide a link to that errata? I still cannot find > it... but from your explanation, that design decision sounds pretty > horrible. Why didn't they just choose not to set old HLC flag in BESL > controllers? Seems like the only purpose it provides there is to make > old drivers break. > > Anyway, looks like we are stuck with it now, and need to deal with > those mislabeled DWC3 versions. I agree with you that we should > blacklist instead of whitelist, but I don't think the device tree is > the best place to put that... we would have to figure out the exact > DWC3 version for every processor/SoC dtsi file to determine if they > are affected, and remember to keep that up to date as we added more. > > I would instead propose to check for the revision register directly in > the DWC3 stack. I think I could add a little check to dwc3_host_init() > and hack the quirk bit into the newly created XHCI controller instance > if required. However, I only have an old (unaffected) 1.85 controller > for testing, so I would need Synopsys to provide me with the exact > revision numbers affected (as read from the register) and to test the > change for us.
OK, I did a little more digging, and it turns out the 2.41a version _does_ set bit 20 in the protocol defined field if BESL support is enabled. It wasn't mentioned in the "registers" section of the databook, but there is a note to that effect in a different section.
So it looks like we don't need to worry about this for the DWC3 controllers, anyway. Sorry for the noise.
-- Paul
| |