lkml.org 
[lkml]   [2013]   [Aug]   [26]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH 11/24] Staging: winbond: reg: fixed some lines over 80 characters
Date
Third of the patches that fixes the lines over 80 characters in reg.c

Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
---
drivers/staging/winbond/reg.c | 30 ++++++++++++++++++++----------
1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/winbond/reg.c b/drivers/staging/winbond/reg.c
index 300038a..0cb0798 100644
--- a/drivers/staging/winbond/reg.c
+++ b/drivers/staging/winbond/reg.c
@@ -1093,15 +1093,18 @@ void RFSynthesizer_initial(struct hw_data *pHwData)
Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50);
usleep(5000);

- ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01B0, 20);
+ ltmp = (1 << 31) | (0 << 30) | (20 << 24)
+ | BitReverse((0x0F << 20) | 0xF01B0, 20);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(5000);

- ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01E0, 20);
+ ltmp = (1 << 31) | (0 << 30) | (20 << 24)
+ | BitReverse((0x0F << 20) | 0xF01E0, 20);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(5000);

- ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01A0, 20);
+ ltmp = (1 << 31) | (0 << 30) | (20 << 24)
+ | BitReverse((0x0F << 20) | 0xF01A0, 20);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);

Wb35Reg_WriteSync(pHwData, 0x105c, pHwData->reg.BB5C);
@@ -1159,30 +1162,37 @@ void RFSynthesizer_initial(struct hw_data *pHwData)

/* ----- Calibration (1). VCO frequency calibration */
/* Calibration (1a.0). Synthesizer reset */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x0F<<24) | 0x00101E, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x0F<<24) | 0x00101E, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(5000);
/* Calibration (1a). VCO frequency calibration mode ; waiting 2msec VCO calibration time */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFE69c0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFE69c0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(2000);

/* ----- Calibration (2). TX baseband Gm-C filter auto-tuning */
/* Calibration (2a). turn off ENCAL signal */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xF8EBC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xF8EBC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* Calibration (2b.0). TX filter auto-tuning BW: TFLBW=101 (TC5376A default) */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x07<<24) | 0x0C68CE, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x07<<24) | 0x0C68CE, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* Calibration (2b). send TX reset signal */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x0F<<24) | 0x00201E, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x0F<<24) | 0x00201E, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* Calibration (2c). turn-on TX Gm-C filter auto-tuning */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFCEBC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFCEBC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
udelay(150); /* Sleep 150 us */
/* turn off ENCAL signal */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xF8EBC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xF8EBC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);

/* ----- Calibration (3). RX baseband Gm-C filter auto-tuning */
--
1.8.1.2


\
 
 \ /
  Last update: 2013-08-26 17:21    [W:0.250 / U:1.636 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site