Messages in this thread | | | Date | Wed, 14 Aug 2013 12:16:42 -0700 | From | David Daney <> | Subject | Re: [PATCH v2 0/2] OCTEON GPIO support. |
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Ping.
Hi Linus,
I wonder if you have had a chance to look at these...
David Daney
On 07/29/2013 02:29 PM, David Daney wrote: > From: David Daney <david.daney@cavium.com> > > The Cavium, OCTEON is a MIPS based SoC. Here we add support for its > on-chip GPIO lines. > > Changes from v1: Cleaned up variable names, messages and added some > comments as suggested by Linus Walleij. > > The second patch depends on the first, but is in code maintained by > Ralf. It may be best to mrege both of these together, perhaps from > the GPIO tree, with Ralf's Acked-by. > > David Daney (2): > MIPS: OCTEON: Select ARCH_REQUIRE_GPIOLIB > gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. > > arch/mips/Kconfig | 1 + > arch/mips/include/asm/mach-cavium-octeon/gpio.h | 21 ++++ > drivers/gpio/Kconfig | 8 ++ > drivers/gpio/Makefile | 1 + > drivers/gpio/gpio-octeon.c | 157 ++++++++++++++++++++++++ > 5 files changed, 188 insertions(+) > create mode 100644 arch/mips/include/asm/mach-cavium-octeon/gpio.h > create mode 100644 drivers/gpio/gpio-octeon.c >
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