Messages in this thread | | | Date | Mon, 1 Jul 2013 19:55:15 +0200 (CEST) | From | Thomas Gleixner <> | Subject | Re: [PATCH v4] ARM: clocksource: add support for MOXA ART SoCs |
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On Mon, 1 Jul 2013, Jonas Jensen wrote: > +static int moxart_clkevt_next_event(unsigned long cycles, > + struct clock_event_device *unused) > +{ > + u32 u; > + > + u = readl(base + TIMER_CR) & ~TIMEREG_CR_1_ENABLE;
You should cache that value and avoid another readout below. You could even cache it in general so you avoid all readouts.
> + writel(u, base + TIMER_CR); > + u = readl(base + TIMER1_BASE + REG_COUNT) - cycles; > + writel(u, base + TIMER1_BASE + REG_MATCH1); > + u = readl(base + TIMER_CR) | TIMEREG_CR_1_ENABLE; > + writel(u, base + TIMER_CR); > + return 0; > +}
Thanks,
tglx
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