Messages in this thread | | | Date | Mon, 1 Jul 2013 11:56:05 +0100 | From | Mark Brown <> | Subject | Re: [PATCH 2/3] drivers: spi: Add qspi flash controller |
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On Wed, Jun 26, 2013 at 01:11:11PM +0530, Sourav Poddar wrote:
> +static int dra7xxx_qspi_prepare_xfer(struct spi_master *master) > +{ > + return 0; > +} > + > +static int dra7xxx_qspi_unprepare_xfer(struct spi_master *master) > +{ > + return 0; > +}
Remove empty functions, though...
> + if (flags & XFER_END) > + dra7xxx_writel(qspi, qspi->cmd | QSPI_INVAL, QSPI_SPI_CMD_REG); > + > + pm_runtime_mark_last_busy(qspi->dev); > + pm_runtime_put_autosuspend(qspi->dev);
...there's no point in doing this per-message, it should be in the prepare and unprepare functions.
> + master = spi_alloc_master(&pdev->dev, sizeof(*qspi)); > + if (!master) > + return -ENOMEM; > + > + master->mode_bits = SPI_CPOL | SPI_CPHA; > + > + master->num_chipselect = 1; > + master->bus_num = -1; > + master->setup = dra7xxx_qspi_setup; > + master->prepare_transfer_hardware = dra7xxx_qspi_prepare_xfer; > + master->transfer_one_message = dra7xxx_qspi_start_transfer_one; > + master->unprepare_transfer_hardware = dra7xxx_qspi_unprepare_xfer; > + master->dev.of_node = pdev->dev.of_node;
There should be some bits per word restrictions in here I think - it looks like only 8 bits per word is supported.
> + qspi->base = devm_request_and_ioremap(&pdev->dev, r); > + if (!qspi->base) { > + dev_dbg(&pdev->dev, "can't ioremap MCSPI\n"); > + ret = -ENOMEM; > + goto free_master; > + }
Use devm_ioremap_resource().
> + if (!of_property_read_u32(np, "spi-max-frequency", &max_freq)) > + qspi->spi_max_frequency = max_freq;
You have OF bindings, there should be a binding document and an OF ID table. [unhandled content-type:application/pgp-signature] | |