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SubjectRe: [PATCHv2] Add TI-Nspire timer support
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On Sat, Jun 1, 2013 at 8:02 AM, Daniel Tang <dt.tangr@gmail.com> wrote:

> The interrupt acknowledgement mechanism is a little strange because the interrupt mask and acknowledge registers are located in another memory mapped I/O peripheral. The address of this register is passed to the driver through device tree bindings.

I can't see any linebreaks there. This looks horrible in git log.

But I guess Daniel can fix it up directly in his tree.

Yours,
Linus Walleij


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