Messages in this thread | | | Date | Thu, 20 Jun 2013 11:41:52 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH] x86/MCE: Update MCE severity condition check |
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On Thu, Jun 20, 2013 at 05:16:12AM -0400, Chen Gong wrote: > Update some SRAR severity conditions check to make it clearer, > according to latest Intel SDM Vol 3(June 2013), table 15-20. > > Signed-off-by: Chen Gong <gong.chen@linux.intel.com> > --- > arch/x86/kernel/cpu/mcheck/mce-severity.c | 15 +++++---------- > 1 file changed, 5 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c > index beb1f16..1fa12ea 100644 > --- a/arch/x86/kernel/cpu/mcheck/mce-severity.c > +++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c > @@ -110,22 +110,17 @@ static struct severity { > /* known AR MCACODs: */ > #ifdef CONFIG_MEMORY_FAILURE > MCESEV( > - KEEP, "HT thread notices Action required: data load error", > - SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA), > - MCGMASK(MCG_STATUS_EIPV, 0) > + KEEP, "Action required but non-affected thread is continuable", > + SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR), > + MCGMASK(MCG_STATUS_RIPV, MCG_STATUS_RIPV) > ), > MCESEV( > - AR, "Action required: data load error", > + AR, "Action required: data load error on user land",
You mean "data load error in a user process"?
> SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA), > USER > ), > MCESEV( > - KEEP, "HT thread notices Action required: instruction fetch error", > - SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR), > - MCGMASK(MCG_STATUS_EIPV, 0) > - ), > - MCESEV( > - AR, "Action required: instruction fetch error", > + AR, "Action required: instruction fetch error on user land",
ditto?
-- Regards/Gruss, Boris.
Sent from a fat crate under my desk. Formatting is fine. --
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