Messages in this thread Patch in this message | | | From | Tomasz Figa <> | Subject | [RFC PATCH 07/11] dmaengine: PL08x: Fix reading the byte count in cctl | Date | Sun, 16 Jun 2013 22:54:14 +0200 |
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From: Alban Bedel <alban.bedel@avionic-design.de>
There are more fields than just SWIDTH in CH_CONTROL register, so read register value must be masked in addition to shifting.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> --- drivers/dma/amba-pl08x.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index 0da5539..bb3b36b 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -471,6 +471,8 @@ static inline u32 get_bytes_in_cctl(u32 cctl) /* The source width defines the number of bytes */ u32 bytes = cctl & PL080_CONTROL_TRANSFER_SIZE_MASK; + cctl &= PL080_CONTROL_SWIDTH_MASK; + switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) { case PL080_WIDTH_8BIT: break; @@ -489,6 +491,8 @@ static inline u32 get_bytes_in_cctl_pl080s(u32 cctl, u32 cctl1) /* The source width defines the number of bytes */ u32 bytes = cctl1 & PL080S_CONTROL_TRANSFER_SIZE_MASK; + cctl &= PL080_CONTROL_SWIDTH_MASK; + switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) { case PL080_WIDTH_8BIT: break; -- 1.8.2.1
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