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    Subject[ 067/115] ARM: 7702/1: Set the page table freeing ceiling to TASK_SIZE
    Date
    3.9-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Catalin Marinas <catalin.marinas@arm.com>

    commit 6aaa189f8712471a250bfdf8fc8d08277258b8ab upstream.

    ARM processors with LPAE enabled use 3 levels of page tables, with an
    entry in the top level (pgd) covering 1GB of virtual space. Because of
    the branch relocation limitations on ARM, the loadable modules are
    mapped 16MB below PAGE_OFFSET, making the corresponding 1GB pgd shared
    between kernel modules and user space.

    If free_pgtables() is called with the default ceiling 0,
    free_pgd_range() (and subsequently called functions) also frees the page
    table shared between user space and kernel modules (which is normally
    handled by the ARM-specific pgd_free() function). This patch changes
    defines the ARM USER_PGTABLES_CEILING to TASK_SIZE when CONFIG_ARM_LPAE
    is enabled.

    Note that the pgd_free() function already checks the presence of the
    shared pmd page allocated by pgd_alloc() and frees it, though with
    ceiling 0 this wasn't necessary.

    Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
    Cc: Hugh Dickins <hughd@google.com>
    Cc: Andrew Morton <akpm@linux-foundation.org>
    Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/arm/include/asm/pgtable.h | 9 +++++++++
    1 file changed, 9 insertions(+)

    --- a/arch/arm/include/asm/pgtable.h
    +++ b/arch/arm/include/asm/pgtable.h
    @@ -70,6 +70,15 @@ extern void __pgd_error(const char *file
    #endif

    /*
    + * Use TASK_SIZE as the ceiling argument for free_pgtables() and
    + * free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
    + * page shared between user and kernel).
    + */
    +#ifdef CONFIG_ARM_LPAE
    +#define USER_PGTABLES_CEILING TASK_SIZE
    +#endif
    +
    +/*
    * The pgprot_* and protection_map entries will be fixed up in runtime
    * to include the cachable and bufferable bits based on memory policy,
    * as well as any architecture dependent bits like global/ASID and SMP



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